Functional or operational testing of electronic circuits, printed circuit boards (PCB), devices, and products is well known in the art. Many electronic manufacturing test stations test functional characteristics of electronic equipment. When a device under test (DUT) fails, manufacturers want to repair the device to avoid scrap waste and to maintain production efficiency. However, there is often only a weak relationship between a failure diagnosed by functional testing and the root cause of the failure. Therefore, it is often difficult or impossible to glean repair insight from a functional testing failure.
Current repair practices rely on expert technicians to perform non-obvious repairs based on extra measurements and/or knowledge of the circuit, PCB, device, or product. This approach can be difficult and time consuming. Sometimes the required time investment exceeds the value of the device being repaired, so that scrapping the device is the prudent thing to do. This process can be inefficient and costly for manufacturers.
Most prior art approaches to fault diagnosis are ad hoc. Some manufacturers depend upon technicians to learn a failure-to-fault mapping over time as they gain experience repairing the circuit, PCB, device, or product. This approach suffers from the disadvantages listed above. Also, this approach suffers from the additional disadvantage that the expert repair knowledge stays with the experienced repair technician. Other repair technicians have difficulty gaining the same knowledge.
Another prior art approach is to have a person developing the tests create a failure-cause mapping that can be used by a repair technician. Preparation of such documentation is time consuming and the results are often inaccurate, because it is difficult, if not impossible, to think of all possible causes for a given failure.
Another prior art approach utilizes artificial intelligence diagnostic software to deduce failure causes. Examples of such software are AITEST (TM) and FAULT DETECTIVE (TM), the latter being a product of Hewlett-Packard. Both software packages require creation of a model of the DUT at a logical or electrical level and additional testing information to map failures to device faults. While artificial intelligence diagnostic software is a valuable diagnostic tool, the required models are cumbersome to create, error prone, and difficult to debug.
Another prior art approach utilizes statistics from repairs to develop failure-to-fault mappings in software. This approach is, again, time consuming and requires a repair technician to accurately perform manual data entry that informs the software what got fixed for particular failures.
For purely digital DUTs, there are well known backtracing algorithms that allow backtracing to the source of failures. These algorithms exploit knowledge about how the digital signals should appear on particular signal nodes of the DUT. These algorithms usually require a complicated simulation model of the DUT to develop the stimulus digital signals and calculate the response digital signals for the DUT. Creating a functional test from these digital patterns is difficult, and the technique cannot be applied to more general circuits involving non-digital signals. Furthermore, simulation models usually assume stuck-at faults, which may not cover the full spectrum of faults, even for digital signals.
Another prior art technique is digital signal analysis. This technique is used, for example, by the HP 3060 (TM) test system, a product of Hewlett-Packard. With this technique, a binary digital signal from a DUT is fed into a synchronous linear feedback shift register, which calculates a checksum value for the signal. If the checksum differs from a known good value, a fault is detected. Digital signal analysis can only be utilized where the sampling clocks of the DUT and linear feedback shift register are the same or synchronized. Digital signal analysis is not applicable to analog signals.